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EDA methodology Perl script for Verilog file to list the pin signals

 

iStock 000016476534XSmall resized 600

We have attached a PERL script which will accept a Verilog file and a Pin from the user on the command line and will report on the signals attached to the pin. Let us know what you think. This sort of script can be very useful to the electrical engineering designing integrated circuits, IC, using electronic design automation, EDA.  Glew Engineering can help you with your EDA methodology by providing tools that can make your engineers more efficient.  The cost of the EDA software, engineering workstation, and the engineer, can be rather high.  It is important to keep them as efficient as possible.

Glew Engineering Consulting's experts in EDA methodology can assist with your CAD EDA systems: Cadence(TM), Synopsys(TM), Mentor Graphics (TM) and more.  

The command line PERL script for use in EDA CAD for semiconductor engineering of integrated circuits (IC) and ASICS is fully functional and yours to try out. This is just a small sample of the many ways in which we can help with your EDA needs for semiconductor IC design.  Contact Glew Engineering to discuss your CAD EDA, or any engineering work your business requires.

procedure( getPinInfo(cv)

foreach( MyTerminal cv~>terminals

case( MyTerminal~>direction

( "input"

fprintf(fp,"+%s:I",MyTerminal~>name)

)

( "output"

fprintf(fp,"+%s:O",MyTerminal~>name)

)

( "inputoutput"

fprintf(fp,"+%s:IO",MyTerminal~>name)

)

)

)

)

procedure( callcv(libName)

fp = outfile("PININFO.1" "w")

libid=ddGetObj(libName)

foreach(dbCell libid~>cells

fprintf(fp,"%s@",dbCell~>name )

if(cv = dbOpenCellViewByType(libid dbCell~>name "symbol" "" "r") then

getPinInfo(cv);

fprintf(fp,"\n");

)

)

close(fp);

)

For more information on Glew Engineering Consulting visit the Glew Engineering website, blog or call 800-877-5892 or 650-641-3019. 

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Linear v Novellus (Semiconductor Equipment)

  
  

After 8 long years, Novellus finally rid itself of the lawsuit with Linear Technology. Irell and Manella LLP, for whom Glew Engineering has worked in the past, took no prisoners in the unanimous jury verdict announced yesterday in favor of their client Novellus.  The jury consisted of 12 men and women in Santa Clara, CA, the heart of the silicon valley.  Certainly good news for Novellus' legal team, as well as their bottom line. Congratulation to Jonathan Kagan Esq. and his colleagues.  Now both sides can get back to what they do best - making chips and chip equipment.

Novellus' also shipped their 1000th Vector PECVD tool in February? Considering the tool's throughput and uptime, there may be as many chips out there by now with Novellus' dielectric films as those of any semiconductor equipment manufacturer. See the details at: 

http://ir.novellus.com/releasedetail.cfm?ReleaseID=441840

 

Semiconductor Equipment, Glew Engineering

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